Hello men, women, children and others I am back after a long session of half yearly’s which SUCKED big time. My nerdy friend (The Tech Nut, dumb ass) here came 5th in the class and I was way back at 8th.

The Nut – Yeah right! As if 8th out of 46 is that bad!

Well, actually now I am no longer bothered and that being a completely different issue, let me go on to today’s post. Today’s post is the 2nd part of my long, boring and droning legacy of a certain company called Intel which makes microprocessors. Without further ado I would like to say that those of who read the earlier post and were bored due to its length might as well leave (Prashanth – you might as well stop here as I have no intention of getting another letter like comment telling me how to blog. I have already warned you and if you don’t wish to heed to my advice, it’s not my fault) even though I am going to try and shorten it. I have decided that I will skip other processors and directly move to the Pentium.

The Nut – Karthick actually wrote this post because I kept bugging him. Apparently any Google search for ‘intel legacy’ would lead them straight to his older post. When I told him that his post was still going strong, and the top post, he decided to come out of his hibernation.

The Pentium

The Pentium brand refers to Intel’s single-core x86 microprocessor based on the P5 fifth-generation microarchitecture considered here as such only. The name ‘Pentium’ was derived from the Greek penta, meaning ‘five’, and the Latin ending -ium. Introduced on March 22, 1993, the Pentium succeeded the Intel486, which number “4″ signified the fourth-generation microarchitecture. Intel selected the Pentium name after courts had disallowed trademarking of names containing numbers – like “286″, “i386″, “i486″ – though, sometimes, the Pentium is unofficially referred to as i586. Vinod Dham is often referred to as the father of the Intel Pentium processor.

Improvements over i486

• Superscalar architecture – The Pentium has two datapaths (pipelines) that allow it to complete more than one instruction per clock cycle. One pipe (called “U”) can handle any instruction, while the other (called “V”) can handle the simplest, most common instructions. The use of more than one pipeline is a characteristic typical of RISC processors designs, the first of many to be implemented on the x86 platform, thus signaling the road to take, and showing that it was possible to merge both technologies, creating almost “hybrid” processors.
• 64-bit data path – This doubles the amount of information pulled from the memory on each fetch. This doesn’t mean that the Pentium can execute 64-bit applications; its main registers are still 32 bits wide.
• MMX instructions (later models only) – A basic SIMD instruction set extension designed for use in multimedia applications.

Pentium architecture chips offered just under twice the performance of a 486 processor per clock cycle. The fastest Intel 486 parts were almost the same speed as a first-generation Pentium, and the AMD Am5x86 was roughly equal to the Pentium 75.

The Pentium (“Classic”) series were designed to run at over 100 million instructions per second (MIPS), with the 75 MHz model running at 126.5 MIPS.

P5, P54C, P54CS

The original Pentium microprocessor had the internal code name P5 and the product code 80501 (80500 for the earliest steppings). This was a pipelined in-order superscalar microprocessor, produced using a 0.8 µm process. It was followed by the P54C (80502), a shrink of the P5 to a 0.6 µm process, which was dual-processor ready and had an internal clock speed different from the front side bus (it’s much more difficult to increase the bus speed than to increase the internal clock). In turn, the P54C was followed by the P54CS, which used a 0.35 µm process – a pure CMOS process, as opposed to the BiCMOS process that was used for the earlier Pentiums.

The early versions of 60-100 MHz Pentiums had a problem in the floating point unit that, in rare cases, resulted in reduced precision of division operations. This bug, discovered in Lynchburg, Virginia in 1994, became known as the Pentium FDIV bug and caused great embarrassment for Intel, which created an exchange program to replace the faulty processors with corrected ones.

The Nut – Cost ‘em a bunch of green, I can bet on THAT!

The 60 and 66 MHz 0.8 µm versions of the Pentium processors were also known for their fragility and their (for the time) high levels of heat production (refer to The Nut’s post on Intel vs AMD)

The Nut - Sob! I’m touched. He actually read my posts during his hibernation!

In fact, the Pentium 60 and 66 were often nicknamed “coffee warmers” (Haha haha haha haha haha haha haha haha… refer to Nelson – The Simpsons).

The Nut – Whateva…

They were also known as “high voltage Pentiums“, due to their 5V operation. The heat problems were removed with the P54C, which ran at a much lower voltage (3.3 V). P5 Pentiums used Socket 4, while P54C started out on Socket 5 before moving to Socket 7 in later revisions. All desktop Pentiums from P54CS onwards used Socket 7. Another bug known as f00f bug was discovered soon afterwards, but fortunately, operating system vendors responded by implementing workarounds that prevented the crash.

P55C, Tillamook

The P55C (or 80503) was developed by Intel’s Research & Development Center in Haifa, Israel. It was sold as Pentium with MMX Technology (usually just called Pentium MMX); although it was based on the P5 core (the 0.35 µm process was also used for this series) it featured a new set of 57 “MMX” instructions intended to improve performance on multimedia tasks, such as encoding and decoding digital media data. The new instructions work on new data types: 64-bit packed vectors of either eight 8-bit integers, four 16-bit integers, two 32-bit integers, or one 64-bit integer. The performance of the P55C was improved over previous versions by a doubling of the Level 1 CPU cache from 16 KiB to 32 KiB.

Pentium P55C notebook CPUs used a “mobile module” that held the CPU. This module was a PCB with the CPU directly attached to it in a special smaller form factor. The module snapped to the notebook motherboard and typically a heat spreader plate was installed and made contact with the module. Such notebooks frequently used the Intel 430MX chipset, a feature-reduced 430FX. However, with the 0.25 µm Tillamook Mobile Pentium MMX (named after a city in Oregon), the module also held the 430TX chipset along with the system’s 512 KiB SRAM cache memory.

I am restricting myself to only one more so as to reduce complains expect more parts of the The Legacy. The next is the Pentium Pro.

The Pentium Pro

The Pentium Pro is a sixth-generation x86 architecture microprocessor (P6 core) produced by Intel and was originally intended to replace the original Pentium in a full range of applications, but later, was reduced to a more narrow role as a server and high-end desktop chip. The Pentium Pro was capable of both dual- and quad-processor configurations. It was introduced in an unusually large, rectangular Socket 8 form factor in November 1995. Intel has since discontinued it in favor of the newer high-end Xeon processor lines.

The Pentium Pro (given the Intel product code 80521), was the first generation of the P6 architecture, which would carry Intel well into the next decade. The design would scale from its initial 150 MHz start, all the way up to 1.4 GHz with the “Tualatin” Pentium III. The Pentium Pro had a theoretical performance of 400 MFLOPS. The core’s various traits would continue after that in the derivative core called “Banias” in Pentium M and Intel Core (Yonah), which itself would evolve into Core architecture (Core 2 processor) in 2006 and onward. Performance with 32-bit code was excellent and well ahead of the older Pentium at the time, by 25-35%; however, the Pentium Pro’s 16-bit performance was approximately only 20% faster than a Pentium at running 16-bit code. It was this, along with the Pentium Pro’s high price, due in part to the full speed L2 cache, that caused the rather lackluster reception for the chip among many home PC enthusiasts, given the dominance at the time of the 16-bit Windows 3.1x and MS-DOS (Microsoft’s Dung On Sale).

The Pentium Pro (P6) core featured an array of advanced RISC technologies, although it wasn’t the first x86 CPU with such approach — before it, the NexGen Nx586 processor already utilized internal x86 translation to its own proprietary RISC86 TM instruction set. Perhaps the most obvious sign that things had changed was that the CPU’s “front end” decoded the old IA32 instructions into micro-instructions which the Pro’s RISC core then processed. The core of Pentium Pro featured several new technologies, including: speculative execution, superpipelining, an advanced L2 cache, register renaming, out of order execution, and a wider 36-bit address bus (usable by PAE).After the microprocessor was released a bug was discovered in the floating point unit, commonly called the “Pentium Pro and Pentium II FPU bug” and by Intel as the “flag erratum”.

Likely Pentium Pro’s most noticeable addition was its on-package L2 cache. At the time, manufacturing technology did not feasibly allow L2 cache to be integrated into the processor core. Intel instead placed the L2 die separately in the package which still allowed it to run at the same clock speed as the CPU core. Additionally, unlike motherboard-based cache which shared the main system bus with the CPU, the Pentium Pro’s cache had its own backside bus (called dual independent bus by Intel). Because of this, the CPU could read main memory and cache concurrently, greatly reducing a traditional bottleneck. The cache was also “non-blocking”, meaning that the processor could issue more than one cache request at a time (up to 4), reducing cache-miss penalties.

However, this far faster L2 cache did come with some complications. All versions of the chip were expensive, those with more than 256 KiB being particularly so. The Pro’s “on-package cache” arrangement was unique. The processor and the cache were on separate dies in the same package and connected closely by a full-speed bus. The two dies — both of which were very large by the standards of the day — had to be bonded together early in the production process, before testing was possible. This meant that a single, tiny flaw in either die made it necessary to discard the entire assembly, which was one of the reasons for the Pentium Pro’s relatively low production yield and high cost.

That is all for today, those of you fools who bothered to read to read till the end -Thank You.